1. Field of the Invention
The present invention relates to a thin film transistor array substrate, and more particularly, to a thin film transistor array substrate and a fabricating method thereof to provide improved picture quality.
2. Description of the Related Art
Generally, a liquid crystal display (LCD) controls the light transmittance of a liquid crystal using an electric field to display a picture. The LCD includes a liquid crystal display panel having liquid crystal cells arranged in a matrix, and a driving circuit for driving the liquid crystal display panel. The liquid crystal display panel includes a thin film transistor array substrate and a color filter array substrate opposed to each other, a liquid crystal injected between two substrates, and a spacer for keep a cell gap between the two substrates.
The thin film transistor array substrate comprises gate lines, data lines crossing the gate lines, thin film transistors, pixel electrodes formed for each liquid crystal cell and connected to the thin film transistor, and alignment films coated thereon. The thin film transistors serve as switching devices and are disposed at each intersection of the gate lines and the data lines. The gate lines and the data lines receive signals from the driving circuits via each pad portion. The thin film transistor applies a pixel signal fed to the data line to the pixel electrode in response to a scanning signal fed to the gate line. The color filter array substrate comprises color filters formed for each liquid crystal cell, black matrices for dividing color filters and reflecting an external light, common electrodes for commonly applying reference voltages to the liquid crystal cells, and an alignment film coated thereon. The liquid crystal display panel is formed by preparing the thin film array substrate and the color filter array substrate individually to join them. A liquid crystal is then injected between the joined substrates and sealed to complete the liquid crystal display panel.
FIG. 1 is a plan view illustrating a general thin film transistor array substrate, and FIG. 2 is a sectional view of a related art thin film transistor array substrate taken along line I-I′ of FIG. 1. As shown in FIGS. 1 and 2, the thin film transistor array substrate includes a gate line 2 and a data line 4 provided on a lower substrate 42 intersecting each other with the gate insulating film 44 therebetween, a thin film transistor 6 provided at each intersection, and a pixel electrode 18 provided at a cell area having a crossing structure. Further, the thin film transistor array substrate includes a storage capacitor 20 provided at an overlapped portion between the pixel electrode 18 and the pre-stage gate line 2.
The thin film transistor 6 includes a gate electrode 8 connected to the gate line 2, a source electrode 10 connected to the data line 4, a drain electrode 12 connected to the pixel electrode 16, and an active layer 14 overlapping the gate electrode 8 and defining a channel between the source electrode 10 and the drain electrode 12. The active layer 14 is partially overlapped by the source electrode 10 and the drain electrode 12, and further includes a channel portion between the source electrode 10 and the drain electrode 12. An ohmic contact layer 47 for making an ohmic contact with the source electrode 10 and the drain electrode 12 is further formed on the active layer 14. Herein, the active layer 14 and the ohmic contact layer 47 form a semiconductor pattern 48.
The thin film transistor 6 allows a pixel voltage signal applied to the data line 4 to be charged into the pixel electrode 18 and held in accordance with a gate signal applied to the gate line 2. The pixel electrode 18 is connected to the drain electrode 12 of the thin film transistor 6 via a first contact hole 16 passing through a protective film 50. The pixel electrode 18 generates a potential difference with respect to a common electrode provided at an upper substrate (not shown) by the charged pixel voltage signal. This potential difference rotates the liquid crystal positioned between the thin film transistor array substrate and the upper substrate due to a dielectric anisotropy and transmits input light via the pixel electrode 18 from a light source (not shown) toward the upper substrate.
The storage capacitor 20 comprises the pre-stage gate line 2, and the pixel electrode 18 overlapping the gate line 2 with the gate insulating film 44 and the protective film 50 therebetween. The storage capacitor 20 allows a pixel voltage charged in the pixel electrode 18 to be stably maintained until the next pixel voltage is charged. The gate line 2 is connected to a gate driver via a gate pad portion (not shown). The data line 4 is connected to a data driver via a data pad portion (not shown).
In the thin film transistor array substrate having the foregoing structure, an inorganic insulating film, such as SiNx, is formed using at least two deposition processes, such as PECVD or sputtering, thereby providing the gate insulating film 44. However, the inorganic insulating film covering the gate electrode 8 and the gate line 2 positioned at the lower portion creates a step profile along the entire length. The step profile reduces the degree of flatness of the thin film transistor array substrate.
Accordingly, as shown in FIG. 3, a technique such that a gate insulating film 43 is formed from an organic material has been suggested. Unlike the inorganic gate insulating film 44 where the inorganic material is coated and dried by a deposition technique, such as PECVD or sputtering, the organic material is coated and undried by a coating technique, such as a spin coating or a spinless coating, to form the organic gate insulating film 43. Accordingly, the inorganic gate insulating film 44, the organic gate insulating film 43 removes step coverage provided by the gate electrode 8 and the gate line 2. Also, the organic gate insulating film 43 has a more simple manufacturing process than the inorganic gate insulating film 44 provided by two deposition processes and is lower in cost. However, the organic gate insulating film 43 has a drawback in that a dielectric constant contrast of a same thickness is smaller than the inorganic gate insulating film 44. This difference in the dielectric constant allows a value of a feed-through voltage ΔVp to be increased so that a deterioration of a picture quality results.
A driving characteristic of the TFT array substrate will now be described with reference to FIG. 4. First, the gate electrode 8 of the TFT 6 is supplied with a gate voltage (Vg) and the source electrode 10 thereof is supplied with a data voltage Vd. If a gate voltage Vg greater than a threshold voltage is applied to the gate electrode 8 of the TFT 6, then a channel is formed between the source electrode 10 and the drain electrode 12. Then, the data voltage Vd is charged, via the source electrode 10 and the drain electrode 12 of the TFT 6, into the liquid crystal cell (Clc) and the storage capacitor (Cst) 20.
A feed-through voltage ΔVp, that is, a difference between the data voltage Vd and a voltage Vlc charged in the liquid crystal cell Clc is defined by equation (1) below.
                              Δ          ⁢                                          ⁢                      V            p                          =                                            C              st                                                      C                gd                            +                              C                lc                            +                              C                st                                              ⁢          Δ          ⁢                                          ⁢                      V            g                                              (        1        )            Here, Cgd is a parasitic capacitance formed between the gate electrode and the drain electrode (or source electrode) of the TFT, Clc is a capacitance of the liquid crystal cell, Cst is a capacitance of the storage capacitor, and ΔVg is a difference voltage between a gate high voltage Vgh and a gate low voltage Vgl. Further, the capacitance C of the capacitor is proportional to ε (dielectric constant) according to equation (2) below.
                    C        =                  ɛ          ⁢                                          ⁢                      d            A                                              (        2        )            Here, Cgd is proportional to a dielectric constant ε of the gate insulating film 43 or 44. A dielectric constant ε of an inorganic material, such as SiNx, is approximately 6-8 while a dielectric constant ε of an organic material is approximately 3-4.
As a result, if the gate insulating film 43 is formed from an organic material instead of an inorganic material, then flattening can be achieved more simply and the value of Cgd is decreased. Thus, there is a further result in that ΔVp is larger. Accordingly, a deterioration of picture quality, such as flicker, occurs.